EDN

RC oscillator IP to counter effects of process variation

A new RC oscillator IP allows the frequency to be trimmed to remove the effects of process variation; it can also be configured as a free-running clock (FRC) where a high-accuracy clock is not ...
Semiconductor Engineering

Cutting Clock Costs On The Bleeding Edge Of Process Nodes

In a recent study done by McKinsey and IDC, we see that physical design and verification costs are increasing exponentially with shrinking transistor sizes. As figure 1 shows, physical design (PD) and ...
isixsigma on MSN

The Power of Special Cause Variation: Learning from Process Changes

Special cause variation, I love to see it! That’s because I know I’m about to learn something important about my process. A ...
Semiconductor Engineering

Impacts Of Process Flow, Scaling, And Variability On Interconnect Performance

Virtual fabrication is used to evaluate the performance of interconnects (line and via resistance, capacitance, etc.) across pitches compatible with either EUV single exposure or SADP for three ...