Electronic Design

Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 3)

Some brief theory and typical measurements of phase noise. How to produce the lowest phase noise at a PLL output. A standard design procedure for a typical Type 2, second-order loop. As stated in ...
EDN

Improve phase noise by down-converting the VCO frequency

Phase noise is a critical parameter in most phase-locked loop (PLL) synthesizer applications. In radars, for example, phase noise at low-offset frequencies translates to the ability to discern between ...
EDN

Extracting Loop Gain and Phase Information from Simulation

How Stable is your Op Amp or FDA design? One of the most important aspects of any end system design is to understand and improve (if necessary) the nominal phase margin for each stage. Since the early ...
Electronic Design

Phase-Noise Modeling, Simulation, and Propagation in Phase-Locked Loops (Part 2)

Some brief theory and typical measurements of phase noise. Standard analysis of PLL phase noise used by most CAD applications. How to produce the lowest phase noise at a PLL output. A standard design ...